Feedback on devicetree entry for Marvell 6176 attached to Intel ethernet controller

[Sriram Chadalavada <sriram.chadalavada@xxxxxxxxxxx>]

Attached is the hardware block diagram for which I'm writing device tree entry.

This node in the device tree with CONFIG_NET_DSA_LEGACY enabled in
4.19 kernel correctly enumerates all interfaces on the Marvell 6176
switch.

dsa@0 {
                compatible = "marvell,dsa";
                #address-cells = <2>;
                #size-cells = <0>;
                interrupt-parent = <&gpio2>;
                interrupts = <&gpio2 31 IRQ_TYPE_LEVEL_LOW>;
                dsa,ethernet = <&eth0>;

                switch@0 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        reg = <0 0>;

                        port@0 {
                                reg = <0>;
                                label = "port0";
                        };

                        port@1 {
                                reg = <1>;
                                label = "port1";
                        };

                        port@2 {
                                reg = <2>;
                                label = "port2";
                        };

                        port@5 {
                                reg = <5>;
                                label = "cpu";
                        };
                };
        };

BUT this entry with the new binding and CONFIG_NET_DSA_LEGACY disabled
does NOT enumerate the network interfaces.
mdio {
                #address-cells = <2>;
                #size-cells = <0>;
                status = "okay";

                switch0: switch@0 {
                        compatible = "marvell,mv88e6085";
                        reg = <0 0>;
                        interrupt-parent = <&gpio2>;
                        interrupts = <31 IRQ_TYPE_LEVEL_LOW>;

                        dsa,member = <0 0>;

                        ports {
                                #address-cells = <1>;
                                #size-cells = <0>;
                                port@0 {
                                        reg = <0>;
                                        label = "port0";
                                };

                                port@1 {
                                        reg = <1>;
                                        label = "port1";
                                };

                                port@2 {
                                        reg = <2>;
                                        label = "port2";
                                };

                                port@5 {
                                        reg = <5>;
                                        label = "cpu";
                                        ethernet = <&eth0>;
                                };
                     };
                };
          };
What am I missing here?

Attachment: HW-BlockDiagram.jpg
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