On 25/03/2020 10:31, Hanks Chen wrote:
> this adds initial MT6779 dts settings fo board support,
"for board support"
> including cpu, gic, timer, ccf, pinctrl, uart...etc.
The etc is PMU and PSCI and sysirq, correct? Let's list at least sysirq as this
is something MediaTek specific.
>
> Signed-off-by: Hanks Chen <hanks.chen@xxxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/mediatek/Makefile | 1 +
> arch/arm64/boot/dts/mediatek/mt6779-evb.dts | 31 ++++
> arch/arm64/boot/dts/mediatek/mt6779.dtsi | 265 +++++++++++++++++++++++++++
> 3 files changed, 297 insertions(+)
> create mode 100644 arch/arm64/boot/dts/mediatek/mt6779-evb.dts
> create mode 100644 arch/arm64/boot/dts/mediatek/mt6779.dtsi
>
> diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
> index 458bbc4..53f1c61 100644
> --- a/arch/arm64/boot/dts/mediatek/Makefile
> +++ b/arch/arm64/boot/dts/mediatek/Makefile
> @@ -1,6 +1,7 @@
> # SPDX-License-Identifier: GPL-2.0
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt2712-evb.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt6755-evb.dtb
> +dtb-$(CONFIG_ARCH_MEDIATEK) += mt6779-evb.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb
> diff --git a/arch/arm64/boot/dts/mediatek/mt6779-evb.dts b/arch/arm64/boot/dts/mediatek/mt6779-evb.dts
> new file mode 100644
> index 0000000..164f5cb
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt6779-evb.dts
> @@ -0,0 +1,31 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (c) 2019 MediaTek Inc.
> + * Author: Mars.C <mars.cheng@xxxxxxxxxxxx>
> + *
> + */
> +
> +/dts-v1/;
> +#include "mt6779.dtsi"
> +
> +/ {
> + model = "MediaTek MT6779 EVB";
> + compatible = "mediatek,mt6779-evb", "mediatek,mt6779";
> +
> + aliases {
> + serial0 = &uart0;
> + };
> +
> + memory@40000000 {
> + device_type = "memory";
> + reg = <0 0x40000000 0 0x1e800000>;
> + };
> +
> + chosen {
> + stdout-path = "serial0:921600n8";
> + };
> +};
> +
> +&uart0 {
> + status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/mediatek/mt6779.dtsi b/arch/arm64/boot/dts/mediatek/mt6779.dtsi
> new file mode 100644
> index 0000000..422ff5f
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt6779.dtsi
> @@ -0,0 +1,265 @@
[...]
> +
> + uart_clk: dummy26m {
> + compatible = "fixed-clock";
> + clock-frequency = <26000000>;
> + #clock-cells = <0>;
> + };
No real clocks for uart? What about CLK_INFRA_UARTx?
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
> + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
> + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW 0>,
> + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW 0>;
> + };
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + compatible = "simple-bus";
> + ranges;
> +
[...]
> +
> + uart0: serial@11002000 {
> + compatible = "mediatek,mt6779-uart",
> + "mediatek,mt6577-uart";
> + reg = <0 0x11002000 0 0x400>;
> + interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&uart_clk>;
> + status = "disabled";
> + };
> +
> + uart1: serial@11003000 {
> + compatible = "mediatek,mt6779-uart",
> + "mediatek,mt6577-uart";
> + reg = <0 0x11003000 0 0x400>;
> + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&uart_clk>;
> + status = "disabled";
> + };
SoC has only two UARTs but clock driver has three, how comes?
> +
> + audio: clock-controller@11210000 {
> + compatible = "mediatek,mt6779-audio", "syscon";
> + reg = <0 0x11210000 0 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> + mfgcfg: clock-controller@13fbf000 {
> + compatible = "mediatek,mt6779-mfgcfg", "syscon";
> + reg = <0 0x13fbf000 0 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> + mmsys: clock-controller@14000000 {
> + compatible = "mediatek,mt6779-mmsys", "syscon";
> + reg = <0 0x14000000 0 0x1000>;
> + #clock-cells = <1>;
> + };
Please beware that we are refactoring the mmsys right now. Please use this new
approach as this will go upstream soon.
https://patchwork.kernel.org/project/linux-mediatek/list/?series=254897
Regards,
Matthias
