Add required device tree nodes to enable the USB SS and HS paths on the primary USB controller on SM8150. In addition, implement missing resources from the SM8150 GCC driver, which includes the USB GDSC and the USB PIPE clocks. Changes in v2: - Combine GDSC and USB PIPE clock changes. - Re-order DTS nodes based on address Jack Pham (1): arm64: dts: qcom: sm8150: Add USB and PHY device nodes Wesley Cheng (1): clk: qcom: gcc: Add USB3 PIPE clock and GDSC for SM8150 arch/arm64/boot/dts/qcom/sm8150-mtp.dts | 17 ++++++ arch/arm64/boot/dts/qcom/sm8150.dtsi | 92 +++++++++++++++++++++++++++++ drivers/clk/qcom/gcc-sm8150.c | 52 ++++++++++++++++ include/dt-bindings/clock/qcom,gcc-sm8150.h | 4 ++ 4 files changed, 165 insertions(+) -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
