Document Intel Keem Bay eMMC PHY DT bindings. Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@xxxxxxxxx> --- .../bindings/phy/intel,keembay-emmc-phy.yaml | 57 +++++++++++++++++++ 1 file changed, 57 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/intel,keembay-emmc-phy.yaml diff --git a/Documentation/devicetree/bindings/phy/intel,keembay-emmc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,keembay-emmc-phy.yaml new file mode 100644 index 000000000000..af1d62fc8323 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/intel,keembay-emmc-phy.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: GPL-2.0-only +# Copyright 2020 Intel Corporation +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/phy/intel,keembay-emmc-phy.yaml#"; +$schema: "http://devicetree.org/meta-schemas/core.yaml#"; + +title: Intel Keem Bay eMMC PHY + +maintainers: + - Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@xxxxxxxxx> + +properties: + compatible: + enum: + - intel,keembay-emmc-phy + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: emmcclk + + intel,syscon: + $ref: '/schemas/types.yaml#/definitions/phandle' + description: + A phandle to a syscon device used to access core/phy configuration + registers. + + "#phy-cells": + const: 0 + +required: + - compatible + - reg + - intel,syscon + - "#phy-cells" + +examples: + - | + mmc_phy_syscon: syscon@20290000 { + compatible = "simple-mfd", "syscon"; + reg = <0x0 0x20290000 0x0 0x54>; + }; + + emmc_phy: mmc_phy@20290000 { + compatible = "intel,keembay-emmc-phy"; + reg = <0x0 0x20290000 0x0 0x54>; + clocks = <&mmc>; + clock-names = "emmcclk"; + intel,syscon = <&mmc_phy_syscon>; + #phy-cells = <0>; + }; -- 2.17.1
