On Wed, May 14, 2014 at 7:27 AM, Thierry Reding <thierry.reding@xxxxxxxxx> wrote: > As for shared clocks I'm only aware of one use-case, namely EMC scaling. > Using clocks for that doesn't seem like the best option to me. While it > can probably fix the immediate issue of choosing an appropriate > frequency for the EMC clock it isn't a complete solution for the problem > that we're trying to solve. From what I understand EMC scaling is one > part of ensuring quality of service. The current implementations of that > seems to abuse clocks (essentially one X.emc clock per X clock) to > signal the amount of memory bandwidth required by any given device. But > there are other parts to the puzzle. Latency allowance is one. The value > programmed to the latency allowance registers for example depends on the > EMC frequency. > > Has anyone ever looked into using a different framework to model all of > these requirements? PM QoS looks like it might fit, but if none of the > existing frameworks have what we need, perhaps something new can be > created. On Exynos we use devfreq, though in that case we monitor performance counters to determine how internal buses should be scaled - not sure if Tegra SoCs have similar counters that could be used for this purpose. It seems like EMC scaling would fit nicely within the PM QoS framework, perhaps with a new PM_QOS_MEMORY_THROUGHPUT class. -Andrew -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
