This patch adds support UART0, I2C0, I2C1 and SPI0 available on Low Speed expansion connector. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@xxxxxxxxxx> --- arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 34 ++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts index 350d3ea60235..fd2bdf10a4d9 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts @@ -434,6 +434,24 @@ vdda-pll-supply = <&vreg_l26a_1p2>; }; +&i2c11 { + /* On Low speed expansion */ + label = "LS-I2C1"; + status = "okay"; +}; + +&i2c14 { + /* On Low speed expansion */ + label = "LS-I2C0"; + status = "okay"; +}; + +&spi2 { + /* On Low speed expansion */ + label = "LS-SPI0"; + status = "okay"; +}; + &pm8998_gpio { vol_up_pin_a: vol-up-active { pins = "gpio6"; @@ -574,6 +592,11 @@ }; }; +&uart3 { + label = "LS-UART0"; + status = "disabled"; +}; + &uart6 { status = "okay"; @@ -589,6 +612,7 @@ }; &uart9 { + label = "LS-UART1"; status = "okay"; }; @@ -674,6 +698,16 @@ }; /* PINCTRL - additions to nodes defined in sdm845.dtsi */ +&qup_spi2_default { + drive-strength = <16>; +}; + +&qup_uart3_default{ + pinmux { + pins = "gpio41", "gpio42", "gpio43", "gpio44"; + function = "qup3"; + }; +}; &qup_uart6_default { pinmux { -- 2.21.0