[PATCH 2/2] doc: dt-binding: cdns-salvo-phy: add binding doc

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Add Cadence SALVO PHY binding doc, this PHY is a lagacy module,
and is only used for USB3 and USB2.

Signed-off-by: Peter Chen <peter.chen@xxxxxxx>
---
 .../bindings/phy/cdns,salvo-phy.yaml          | 47 +++++++++++++++++++
 1 file changed, 47 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/cdns,salvo-phy.yaml

diff --git a/Documentation/devicetree/bindings/phy/cdns,salvo-phy.yaml b/Documentation/devicetree/bindings/phy/cdns,salvo-phy.yaml
new file mode 100644
index 000000000000..f829f44c5e33
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/cdns,salvo-phy.yaml
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright (c) 2020 NXP
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/phy/cdns,salvo-phy.yaml#";
+$schema: "http://devicetree.org/meta-schemas/core.yaml#";
+
+title: Cadence SALVO PHY
+
+maintainers:
+  - Peter Chen <peter.chen@xxxxxxx>
+
+properties:
+  compatible:
+    enum:
+      - nxp,salvo-phy
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  clock-names:
+    items:
+      - const: salvo_phy_clk
+
+  "#phy-cells":
+    const: 1
+
+required:
+  - compatible
+  - reg
+  - "#phy-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    usb3phy: usb3-phy {
+	  compatible = "nxp,salvo-phy";
+	  reg = <0x5B160000 0x40000>;
+	  clocks = <&usb3_lpcg 4>;
+	  clock-names = "salvo_phy_clk";
+	  power-domains = <&pd IMX_SC_R_USB_2_PHY>;
+	  #phy-cells = <0>;
+};
-- 
2.17.1




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