According to latest datasheet Rev.0, 10/2019, there is restriction
as below:
"If VDD_SOC/GPU/DDR = 0.95V, then VDD_ARM must be >= 0.95V."
As by default SoC is running at OD mode(VDD_SOC = 0.95V), so
VDD_ARM 1.2GHz OPP's voltage should be increased to 0.95V.
Signed-off-by: Anson Huang <Anson.Huang@xxxxxxx>
---
arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
index 2497eeb..7a61a1a 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
@@ -13,6 +13,12 @@
compatible = "fsl,imx8mn-ddr4-evk", "fsl,imx8mn";
};
+&a53_opp_table {
+ opp-1200000000 {
+ opp-microvolt = <950000>;
+ };
+};
+
&A53_0 {
cpu-supply = <&buck2_reg>;
};
--
2.7.4
