Quoting Taniya Das (2020-02-11 04:13:55) > The clock disable signal for video_cc_vcodec0_core_clk is tied to > vcodec0_gdsc which is supported in the HW control mode. Thus turning off > the clock would be taken care automatically when the GDSC turns OFF by > hardware and clock driver does not require to poll on the CLK_OFF bit. > > Signed-off-by: Taniya Das <tdas@xxxxxxxxxxxxxx> > --- Applied to clk-fixes
