On Wed, Feb 12, 2020 at 02:04:31PM +0000, Robin Murphy wrote: >> For now, let's say that we limit dma-ranges to 4GB size. with "dma-ranges >> = <0x00000000 0x00000000 0x1 0x00000000>;" >> Then, dma_bus_limit is set correctly to 0xffffffff, SATA driver sets masks >> to 64-bit as IP supports that. >> >> [ 13.306847] ahci 4a140000.sata: dma_mask 0xffffffffffffffff, >> coherent_mask 0xffffffffffffffff, dma_bus_limit 0xffffffff >> >> However, the SATA controller still tries to do DMA above 32-bits. >> dma_alloc() doesn't seem to be taking dma_bus_limit into account? > > Yay ARM LPAE... Peter and Christoph have already been playing whack-a-mole > with other bugs under that config - is this with or without SWIOTLB? (and > whichever way, does the other work any better?) Hmm. ARM LPAE still uses the arm legacy dma alloc coherent, and that might not be taking the dma_bus_limit into account. Let me check..
