Re: [PATCH 5/6] PCI: rockchip: add DesignWare based PCIe controller

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On 2020/1/19 0:36, Francesco Lavra wrote:
On 1/14/20 8:25 AM, Shawn Lin wrote:
+static int rockchip_pcie_reset_control_release(struct rockchip_pcie *rockchip)
+{
+    struct device *dev = rockchip->pci->dev;
+    struct property *prop;
+    const char *name;
+    int ret, count, i = 0;
+
+    count = of_property_count_strings(dev->of_node, "reset-names");
+    if (count < 1)
+        return -ENODEV;
+
+    rockchip->rsts = devm_kcalloc(dev, count,
+                     sizeof(struct reset_bulk_data),
+                     GFP_KERNEL);
+    if (!rockchip->rsts)
+        return -ENOMEM;
+
+    of_property_for_each_string(dev->of_node, "reset-names",
+                    prop, name) {
+        rockchip->rsts[i].id = name;
+        if (!rockchip->rsts[i].id)
+            return -ENOMEM;
+        i++;
+    }
+
+    for (i = 0; i < count; i++) {
+        rockchip->rsts[i].rst = devm_reset_control_get_exclusive(dev,
+                        rockchip->rsts[i].id);
+        if (IS_ERR_OR_NULL(rockchip->rsts[i].rst)) {
+            dev_err(dev, "failed to get %s\n",
+                rockchip->clks[i].id);
+            return -PTR_ERR(rockchip->rsts[i].rst);

IS_ERR_OR_NULL() should be replaced with IS_ERR(), because devm_reset_control_get_exclusive() never returns a NULL value. Also, in case of error you should return the value from PTR_ERR(), without the minus sign.

Thanks, Francesco. Will fix in v2.








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