RE: [PATCH 2/6] arm64: dts: ls104xardb: set correct PHY interface mode

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> -----Original Message-----
> From: Andrew Lunn <andrew@xxxxxxx>
> Sent: Thursday, December 19, 2019 6:06 PM
> To: Madalin Bucur <madalin.bucur@xxxxxxx>
> Cc: davem@xxxxxxxxxxxxx; netdev@xxxxxxxxxxxxxxx; linux@xxxxxxxxxxxxxxx;
> f.fainelli@xxxxxxxxx; hkallweit1@xxxxxxxxx; shawnguo@xxxxxxxxxx;
> devicetree@xxxxxxxxxxxxxxx
> Subject: Re: [PATCH 2/6] arm64: dts: ls104xardb: set correct PHY interface
> mode
> 
> On Thu, Dec 19, 2019 at 05:21:17PM +0200, Madalin Bucur wrote:
> > From: Madalin Bucur <madalin.bucur@xxxxxxx>
> >
> > The DPAA 1 based LS1043ARDB and LS1046ARDB boards are using
> > XFI for the 10G interfaces. Since at the moment of the addition
> > of the first DPAA platforms the only 10G PHY interface type used
> > was XGMII, although the boards were actually using XFI, they were
> > wrongly declared as xgmii. This has propagated along the DPAA
> > family of SoCs, all 10G interfaces being declared wrongly as
> > XGMII. This patch addresses the problem for the ARM based DPAA
> > SoCs. After the introduction of XFI PHY interface type we can
> > address this issue.
> 
> Hi Madalin
> 
> This patch should come at the end, after you have added support for
> these new modes. Otherwise anybody doing a git bisect could land on
> code which has broken ethernet.
> 
>      Andrew

Hi Andrew,

you are right, if the device tree would arrive intact to the kernel that
could occur. Unfortunately there are some fix-ups performed by the bootloader
(u-boot) that are likely to override the compatible so this ordering issue
is shadowed by that other problem.

Madalin





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