On 18-12-19, 23:06, Bjorn Andersson wrote:
> On Wed 18 Dec 20:20 PST 2019, Vinod Koul wrote:
>
> > On 07-12-19, 12:21, Bjorn Andersson wrote:
> > > static const unsigned int pciephy_regs_layout[] = {
> > > [QPHY_COM_SW_RESET] = 0x400,
> > > [QPHY_COM_POWER_DOWN_CONTROL] = 0x404,
> > > @@ -330,6 +335,75 @@ static const struct qmp_phy_init_tbl msm8998_pcie_pcs_tbl[] = {
> > > QMP_PHY_INIT_CFG(QPHY_V3_PCS_SIGDET_CNTRL, 0x03),
> > > };
> > >
> > > +static const struct qmp_phy_init_tbl msm8996_ufs_serdes_tbl[] = {
> > > + QMP_PHY_INIT_CFG(QPHY_POWER_DOWN_CONTROL, 0x01),
> >
> > Can you check this after adding the reset for ufs, I suspect you might
> > run into same issue as I am seeing on 8150, power down here does not
> > seem correct.
> >
>
> I'm not sure why we need to tickle POWER_DOWN here, but it's documented
> as such, done in the old driver and without it the PHY does not come up.
I checked and you *may* leave this as is. The register write preceding this
is same, so we are writing twice, but does not seem have any side effect
so we can keep it here :)
--
~Vinod
