On Mon, Dec 16, 2019 at 12:59:14AM +0800, Chen-Yu Tsai wrote:
> From: Chen-Yu Tsai <wens@xxxxxxxx>
>
> The Allwinner camera sensor interface has a different definition of
> [HV]sync. While the timing diagram uses the names HSYNC and VSYNC,
> the note following the diagram and register names use HREF and VREF.
> Combined they imply the hardware uses either [HV]REF or inverted
> [HV]SYNC. There are also registers to set horizontal skip lengths
> in pixels and vertical skip lengths in lines, also known as back
> porches.
>
> Fix the polarity handling by using the opposite polarity flag for
> the checks. Also rename `[hv]sync_pol` to `[hv]ref_pol` to better
> match the hardware register description.
>
> Fixes: 577bbf23b758 ("media: sunxi: Add A10 CSI driver")
> Signed-off-by: Chen-Yu Tsai <wens@xxxxxxxx>
Acked-by: Maxime Ripard <mripard@xxxxxxxxxx>
Thanks!
Maxime
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