Hi Kishon, Could you please pick the first 2 patches in this series for phy-next? They are independent of the rest. Thanks. cheers, -roger On 05/05/2014 12:54 PM, Roger Quadros wrote: > Hi, > > This series enables the 2 USB ports on the DRA7-evm. > > NOTE: USB1 port is hard coded to work in peripheral mode and USB2 port > in host mode. This is due to missing ID pin interrupt in pre ver.E boards. > > USB1 port doesn't in peripheral mode out of the box due to missing VBUS detection > and mailbox write. To test this I had to do a manual write to enable VBUSVALID > in the USB_UTMI_OTG_STATUS register. > omapconf set bit 0x48880084 1 > > USB2 port works well in host mode. > > Patches are based on 3.15-rc3. > > cheers, > -roger > > Changelog: > > v3: > -Rearraged patches. PHY related stuff first. > -Addressed backward compatibility issue for phy-omap-usb2. > > v2: > -Rebased on v3.15-rc3 > > --- > Roger Quadros (7): > phy: omap-usb2: Use generic clock names "wkupclk" and "refclk" > phy: omap-usb2: Add clock names to Documentation binding > ARM: dts: omap4+: Add clocks to USB2 PHY node > ARM: dts: dra7-clock: Add "l3init_960m_gfclk" clock gate > ARM: DRA7: hwmod: Add SYSCONFIG for usb_otg_ss > ARM: dts: dra7: Add USB related nodes > dts: dra7-evm: add USB support > > Documentation/devicetree/bindings/phy/ti-phy.txt | 7 ++ > arch/arm/boot/dts/dra7-evm.dts | 24 ++++ > arch/arm/boot/dts/dra7.dtsi | 149 +++++++++++++++++++++++ > arch/arm/boot/dts/dra7xx-clocks.dtsi | 12 +- > arch/arm/boot/dts/omap4.dtsi | 2 + > arch/arm/boot/dts/omap5.dtsi | 2 + > arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 22 ++-- > drivers/phy/phy-omap-usb2.c | 30 +++-- > 8 files changed, 229 insertions(+), 19 deletions(-) > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
