Hi, Michael, > Caution: EXT Email > > Hi Alison, > > Am 2019-12-10 06:35, schrieb Alison Wang: > > Hi, Michael, > > > > In most of our cases, TX and RX are using the same BCLK and SYNC > > clocks. So the default synchronous mode (sync Rx with Tx) is used, > > which means both transmitter and receiver will send and receive data > > by following clocks of transmitter. It is verified on our boards. > > > I get that, but it doesn't make sense for the LS1028A SoC because, there is no > way you have have the TX data and the RX clocks or vice versa. The hardware > of the SoC doesn't allow that. I cannot speak of the QDS variant of the SoC, but > the LS1028ARDB only has a transmitter. So there is no problem, because it will > default to the TX clock. But as soon as you also have a receiver you have to use > the clock of the receiver block. You could say, use fsl,sai-synchronous-rx, but > that will only work if the SAI is used in RX mode. fsl,sai-asynchronous mode > works for both on the other hand and can therefore be the default mode. > > -michael [Alison] Your explanation is reasonable. LS1028A SoC is a specific one. Using fsl,sai-asynchronous mode is the preferred choice. Acked-by: Alison Wang <alison.wang@xxxxxxx> Best Regards, Alison Wang > > > > > > > > Best Regards, > > Alison Wang > > > >> -----Original Message----- > >> From: Shawn Guo <shawnguo@xxxxxxxxxx> > >> Sent: Monday, December 9, 2019 5:09 PM > >> To: Michael Walle <michael@xxxxxxxx>; Alison Wang > >> <alison.wang@xxxxxxx> > >> Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; > >> linux-kernel@xxxxxxxxxxxxxxx; Leo Li <leoyang.li@xxxxxxx>; Rob > >> Herring <robh+dt@xxxxxxxxxx>; Mark Rutland <mark.rutland@xxxxxxx> > >> Subject: [EXT] Re: [PATCH] arm64: dts: ls1028a: put SAIs into async > >> mode > >> > >> Caution: EXT Email > >> > >> + Alison Wang > >> > >> On Fri, Nov 29, 2019 at 10:09:37PM +0100, Michael Walle wrote: > >> > The LS1028A SoC has only unidirectional SAIs. Therefore, it doesn't > >> > make sense to have the RX and TX part synchronous. Even worse, the > >> > RX part wont work out of the box because by default it is > >> > configured as synchronous to the TX part. And as said before, the > >> > pinmux of the SoC can only be configured to route either the RX or > >> > the TX signals to the SAI but never both at the same time. Thus > >> > configure the asynchronous mode by default. > >> > > >> > Signed-off-by: Michael Walle <michael@xxxxxxxx> > >> > >> Alison, Leo, > >> > >> Looks good to you? > >> > >> Shawn > >> > >> > --- > >> > arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 6 ++++++ > >> > 1 file changed, 6 insertions(+) > >> > > >> > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > >> > b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > >> > index 379913756e90..9be33426e5ce 100644 > >> > --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > >> > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > >> > @@ -637,6 +637,7 @@ > >> > dma-names = "tx", "rx"; > >> > dmas = <&edma0 1 4>, > >> > <&edma0 1 3>; > >> > + fsl,sai-asynchronous; > >> > status = "disabled"; > >> > }; > >> > > >> > @@ -651,6 +652,7 @@ > >> > dma-names = "tx", "rx"; > >> > dmas = <&edma0 1 6>, > >> > <&edma0 1 5>; > >> > + fsl,sai-asynchronous; > >> > status = "disabled"; > >> > }; > >> > > >> > @@ -665,6 +667,7 @@ > >> > dma-names = "tx", "rx"; > >> > dmas = <&edma0 1 8>, > >> > <&edma0 1 7>; > >> > + fsl,sai-asynchronous; > >> > status = "disabled"; > >> > }; > >> > > >> > @@ -679,6 +682,7 @@ > >> > dma-names = "tx", "rx"; > >> > dmas = <&edma0 1 10>, > >> > <&edma0 1 9>; > >> > + fsl,sai-asynchronous; > >> > status = "disabled"; > >> > }; > >> > > >> > @@ -693,6 +697,7 @@ > >> > dma-names = "tx", "rx"; > >> > dmas = <&edma0 1 12>, > >> > <&edma0 1 11>; > >> > + fsl,sai-asynchronous; > >> > status = "disabled"; > >> > }; > >> > > >> > @@ -707,6 +712,7 @@ > >> > dma-names = "tx", "rx"; > >> > dmas = <&edma0 1 14>, > >> > <&edma0 1 13>; > >> > + fsl,sai-asynchronous; > >> > status = "disabled"; > >> > }; > >> > > >> > -- > >> > 2.20.1 > >> >
