On Fri, Nov 22, 2019 at 11:45:00PM +0200, Leonard Crestez wrote: > These clocks are only modified as part of DRAM frequency switches during > which DRAM itself is briefly inaccessible. The switch is performed with > a SMC call to by TF-A which runs from a SRAM area; upon returning to > linux several clocks bits are modified and we need to update them. > > For rate bits an easy solution is to just mark with > CLK_GET_RATE_NOCACHE so that new rates are always read back from > registers. > > Signed-off-by: Leonard Crestez <leonard.crestez@xxxxxxx> > Reviewed-by: Abel Vesa <abel.vesa@xxxxxxx> Applied, thanks.
