On Wed, Dec 04, 2019 at 02:52:11AM +0000, Anson Huang wrote:
>
>
> > Subject: Re: [PATCH 3/3] ARM: dts: imx6sll: Add Rev A board support
> >
> > On Wed, Nov 06, 2019 at 05:47:30PM +0800, Anson Huang wrote:
> > > i.MX6SLL EVK Rev A board is same with latest i.MX6SLL EVK board except
> > > eMMC can ONLY run at HS200 mode, add support for this board.
> > >
> > > Signed-off-by: Anson Huang <Anson.Huang@xxxxxxx>
> > > ---
> > > arch/arm/boot/dts/Makefile | 1 +
> > > arch/arm/boot/dts/imx6sll-evk-reva.dts | 12 ++++++++++++
> > > 2 files changed, 13 insertions(+)
> > > create mode 100644 arch/arm/boot/dts/imx6sll-evk-reva.dts
> > >
> > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > > index 71f08e7..3845bbf 100644
> > > --- a/arch/arm/boot/dts/Makefile
> > > +++ b/arch/arm/boot/dts/Makefile
> > > @@ -557,6 +557,7 @@ dtb-$(CONFIG_SOC_IMX6SL) += \
> > > imx6sl-warp.dtb
> > > dtb-$(CONFIG_SOC_IMX6SLL) += \
> > > imx6sll-evk.dtb \
> > > + imx6sll-evk-reva.dtb \
> > > imx6sll-kobo-clarahd.dtb
> > > dtb-$(CONFIG_SOC_IMX6SX) += \
> > > imx6sx-nitrogen6sx.dtb \
> > > diff --git a/arch/arm/boot/dts/imx6sll-evk-reva.dts
> > > b/arch/arm/boot/dts/imx6sll-evk-reva.dts
> > > new file mode 100644
> > > index 0000000..7ca2563
> > > --- /dev/null
> > > +++ b/arch/arm/boot/dts/imx6sll-evk-reva.dts
> > > @@ -0,0 +1,12 @@
> > > +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> > > +/*
> > > + * Copyright 2016 Freescale Semiconductor, Inc.
> > > + * Copyright 2017-2019 NXP.
> > > + *
> > > + */
> > > +
> > > +#include "imx6sll-evk.dts"
> > > +
> > > +&usdhc2 {
> > > + compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-usdhc";
> >
> > It looks odd to me that we need to deal with a board level difference with a
> > SoC level compatible. The USDHC compatible should be solely determined by
> > the IP programming model, not the board level capability.
>
> So how to handle such scenario? Current usdhc driver uses SoC compatible to distinguish
> different functions of uSDHC IP, if some boards can NOT support dedicated function due to
> board design regardless of the IP inside, the easy way is just to downgrade the SoC compatible,
> or need uSDHC driver to provide some DT properties for such case?
So you are saying this is a complete board design limitation, not SoC/IP
related? In that case, IMO, we need a board level DT property to deal
with it.
Shawn
