[PATCH] arm64: dts: rockchip: Add regulators for pcie on rk3399-roc-pc

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Add regulators to pcie node from schematics.

Signed-off-by: Markus Reichl <m.reichl@xxxxxxxxxxxxx>
---
 .../boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts      |  2 ++
 arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi        | 10 ++++++++++
 2 files changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts
index d6b3042cffa9..2c9c13a0fca9 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts
@@ -50,6 +50,8 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pcie_perst>;
 	vpcie3v3-supply = <&vcc3v3_pcie>;
+	vpcie1v8-supply = <&vcc1v8_pmu>;
+	vpcie0v9-supply = <&vcca_0v9>;
 	status = "okay";
 };
 
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi
index 287f97488f65..2ef8ee2eae02 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi
@@ -145,6 +145,16 @@
 		vin-supply = <&dc_12v>;
 	};
 
+	vcca_0v9: vcca-0v9 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcca_0v9";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <900000>;
+		regulator-max-microvolt = <900000>;
+		vin-supply = <&vcc3v3_sys>;
+	};
+
 	/* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
 	vcc5v0_host: vcc5v0-host-regulator {
 		compatible = "regulator-fixed";
-- 
2.20.1

This is an OpenPGP/MIME signed message (RFC 4880 and 3156)
--ma6Nskd4tpvP5vsRVUnUWsgiIS2DwbBnW
Content-Type: multipart/mixed; boundary="yJZwcp1Ymsuklh7aGS9WMHUNJ1nnL5i5j";
 protected-headers="v1"
From: Markus Reichl <m.reichl@xxxxxxxxxxxxx>
To: Rob Herring <robh+dt@xxxxxxxxxx>, Mark Rutland <mark.rutland@xxxxxxx>,
 Heiko Stuebner <heiko@xxxxxxxxx>, Jagan Teki <jagan@xxxxxxxxxxxxxxxxxxxx>,
 Markus Reichl <m.reichl@xxxxxxxxxxxxx>, devicetree@xxxxxxxxxxxxxxx,
 linux-arm-kernel@xxxxxxxxxxxxxxxxxxx, linux-rockchip@xxxxxxxxxxxxxxxxxxx,
 linux-kernel@xxxxxxxxxxxxxxx
Message-ID: <7d8d85c9-5fde-7943-a6b6-639bca38bdc1@xxxxxxxxxxxxx>
Subject: [PATCH] arm64: dts: rockchip: Add LED nodes on rk3399-roc-pc

--yJZwcp1Ymsuklh7aGS9WMHUNJ1nnL5i5j
Content-Type: text/plain; charset=utf-8
Content-Language: de-DE
Content-Transfer-Encoding: quoted-printable

rk3399-roc-pc has three gpio LEDs, enable them.

Signed-off-by: Markus Reichl <m.reichl@xxxxxxxxxxxxx>
---
 .../arm64/boot/dts/rockchip/rk3399-roc-pc.dts | 41 +++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts b/arch/arm64/=
boot/dts/rockchip/rk3399-roc-pc.dts
index faf60b2a7673..ba52e1053a2d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts
@@ -28,6 +28,33 @@
 		#clock-cells =3D <0>;
 	};
=20
+	leds {
+		compatible =3D "gpio-leds";
+		pinctrl-names =3D "default";
+		pinctrl-0 =3D <&work_led_gpio>, <&diy_led_gpio>, <&yellow_led_gpio>;
+
+		work-led {
+			label =3D "green:work";
+			gpios =3D <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
+			default-state =3D "on";
+			linux,default-trigger =3D "heartbeat";
+		};
+
+		diy-led {
+			label =3D "red:diy";
+			gpios =3D <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
+			default-state =3D "off";
+			linux,default-trigger =3D "mmc1";
+		};
+
+		yellow-led {
+			label =3D "yellow:yellow-led";
+			gpios =3D <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
+			default-state =3D "off";
+			linux,default-trigger =3D "mmc0";
+		};
+	};
+
 	sdio_pwrseq: sdio-pwrseq {
 		compatible =3D "mmc-pwrseq-simple";
 		clocks =3D <&rk808 1>;
@@ -494,6 +521,20 @@
 		};
 	};
=20
+	leds {
+		work_led_gpio: work_led-gpio {
+			rockchip,pins =3D <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		diy_led_gpio: diy_led-gpio {
+			rockchip,pins =3D <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		yellow_led_gpio: yellow_led-gpio {
+			rockchip,pins =3D <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
 	pmic {
 		vsel1_gpio: vsel1-gpio {
 			rockchip,pins =3D <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
--=20
2.20.1





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