Re: [PATCH v2 2/2] clk: ast2600: Add RMII RCLK gates for all four MACs

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Subject: Re: [PATCH v2 2/2] clk: ast2600: Add RMII RCLK gates for all four MACs
From: Stephen Boyd <sboyd@xxxxxxxxxx>
Date: Fri, 08 Nov 2019 08:48:53 -0800
Cc: mturquette@xxxxxxxxxxxx, joel@xxxxxxxxx, robh+dt@xxxxxxxxxx, mark.rutland@xxxxxxx, linux-arm-kernel@xxxxxxxxxxxxxxxxxxx, linux-aspeed@xxxxxxxxxxxxxxxx, linux-kernel@xxxxxxxxxxxxxxx, devicetree@xxxxxxxxxxxxxxx
In-reply-to: <20191010020725.3990-3-andrew@aj.id.au>
User-agent: alot/0.8.1

Quoting Andrew Jeffery (2019-10-09 19:07:25)
> RCLK is a fixed 50MHz clock derived from HPLL/HCLK that is described by a
> single gate for each MAC.
> 
> Signed-off-by: Andrew Jeffery <andrew@xxxxxxxx>
> ---

Applied to clk-next

References:
- [PATCH v2 0/2] clk: ast2600: Expose RMII RCLK for MACs 1-4
  - From: Andrew Jeffery
- [PATCH v2 2/2] clk: ast2600: Add RMII RCLK gates for all four MACs
  - From: Andrew Jeffery

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