Hi Prabhakar,
On Thu, Nov 7, 2019 at 11:46 PM Lad, Prabhakar
<prabhakar.csengg@xxxxxxxxx> wrote:
> On Thu, Nov 7, 2019 at 8:08 PM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
> > On Thu, Nov 7, 2019 at 10:26 AM Lad, Prabhakar
> > <prabhakar.csengg@xxxxxxxxx> wrote:
> > > On Thu, Nov 7, 2019 at 8:44 AM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
> > > > On Wed, Nov 6, 2019 at 8:36 PM Lad Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> > > > > From: "Lad, Prabhakar" <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > > > >
> > > > > This patch adds the bindings for the R-Car PCIe endpoint driver.
> > > > >
> > > > > Signed-off-by: Lad, Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > > >
> > > > > --- /dev/null
> > > > > +++ b/Documentation/devicetree/bindings/pci/rcar-pci-ep.txt
> > > > > +- reg: Five register ranges as listed in the reg-names property
> > > > > +- reg-names: Must include the following names
> > > > > + - "apb-base"
> > > > > + - "memory0"
> > > > > + - "memory1"
> > > > > + - "memory2"
> > > > > + - "memory3"
> > > >
> > > > What is the purpose of the last 4 regions?
> > > > Can they be chosen by the driver, at runtime?
> > > >
> > > no the driver cannot choose them at runtime, as these are the only
> > > PCIE memory(0/1/2/3) ranges
> > > in the AXI address space where host memory can be mapped.
> >
> > Are they fixed by the PCIe hardware, i.e. could they be looked up by the
> > driver based on the compatible value?
> >
> yes they are fixed by the PCIe hardware and could be looked up by the driver
> based on the compatible value.
Thanks, so we don't need to describe them in DT.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
