On Thu, 7 Nov 2019, Christoph Hellwig wrote:
> Add the binding for the trivial Qemu RISC-V poweroff mechanism, which is
There's nothing RISC-V specific here. This IP isn't defined in the RISC-V
specifications, or anything like that.
Apparently it's a SiFive IP block which now has a virtual IP
implementation in QEMU in hw/riscv/sifive_test.c. But since there's
nothing RISC-V specific about this IP block, any QEMU system, with any CPU
implementation, should be able to use this virtual IP, and this Linux
driver.
For these reasons, it's better if "RISC-V" is just removed from everywhere
in this driver. If something needs to go in its place, "SiFive" may be
better.
- Paul
> just a single MMIO register exposed through the DT.
>
> Signed-off-by: Christoph Hellwig <hch@xxxxxx>
> ---
> .../power/reset/qemu-riscv-virt-poweroff.txt | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/power/reset/qemu-riscv-virt-poweroff.txt
>
> diff --git a/Documentation/devicetree/bindings/power/reset/qemu-riscv-virt-poweroff.txt b/Documentation/devicetree/bindings/power/reset/qemu-riscv-virt-poweroff.txt
> new file mode 100644
> index 000000000000..80ff6fd4e3b7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/reset/qemu-riscv-virt-poweroff.txt
> @@ -0,0 +1,16 @@
> +QEMU RISC-V virt machine poweroff device
> +
> +This is a device in Qemu that can signal successful or error exit
> +by writing two magic numbers to a trivial mmio register.
> +A Linux poweroff is implemented as successful exit.
> +
> +Required Properties:
> +-compatible: "sifive,test0"
> +-reg: Specifies the physical address of the register
> +
> +Example:
> +
> + test@100000 {
> + compatible = "sifive,test0";
> + reg = <0x100000 0x1000>;
> + };
> --
> 2.20.1
>
>
- Paul
