Associate the UART nodes with the corresponding reset controller bits. Signed-off-by: Andreas Färber <afaerber@xxxxxxx> --- v2: New arch/arm/boot/dts/rtd1195.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi index fdcaf48a26f2..e2cdcbcf70f4 100644 --- a/arch/arm/boot/dts/rtd1195.dtsi +++ b/arch/arm/boot/dts/rtd1195.dtsi @@ -128,6 +128,7 @@ reg = <0x18007800 0x400>; reg-shift = <2>; reg-io-width = <4>; + resets = <&iso_reset 8>; clock-frequency = <27000000>; status = "disabled"; }; @@ -137,6 +138,7 @@ reg = <0x1801b200 0x100>; reg-shift = <2>; reg-io-width = <4>; + resets = <&reset2 28>; clock-frequency = <27000000>; status = "disabled"; }; -- 2.16.4
