Document Amazon's Annapurna Labs Memory Controller EDAC SoC binding.
Signed-off-by: Talel Shenhar <talel@xxxxxxxxxx>
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+Amazon's Annapurna Labs Memory Controller EDAC
+
+EDAC node is defined to describe on-chip error detection and correction for
+Amazon's Annapurna Labs Memory Controller.
+
+Required properties:
+- compatible: Shall be "amazon,al-mc-edac".
+- reg: DDR controller resource.
+
+Optional:
+- interrupt-names: may include "ue", for uncorrectable errors,
+ and/or "ce", for correctable errors.
+- interrupts: should contain the interrupts associated with the
+ interrupts names.
+
+Example:
+
+al_mc_edac {
+ compatible = "amazon,al-mc-edac";
+ reg = <0x0 0xf0080000 0x0 0x00010000>;
+ interrupt-parent = <&amazon_al_system_fabric>;
+ interrupt-names = "ue";
+ interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
+};
--
2.7.4
