Hi Rob,
Thank you for the review comments.
On 28/8/2019 7:39 PM, Rob Herring wrote:
On Tue, Aug 27, 2019 at 10:47 PM Ramuthevar, Vadivel MuruganX
<vadivel.muruganx.ramuthevar@xxxxxxxxxxxxxxx> wrote:
Hi Rob,
On 27/8/2019 8:39 PM, Rob Herring wrote:
On Tue, Aug 27, 2019 at 3:27 AM Ramuthevar,Vadivel MuruganX
<vadivel.muruganx.ramuthevar@xxxxxxxxxxxxxxx> wrote:
From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@xxxxxxxxxxxxxxx>
Add a YAML schema to use the host controller driver with the
SDXC PHY on Intel's Lightning Mountain SoC.
Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@xxxxxxxxxxxxxxx>
---
.../bindings/phy/intel,lgm-sdxc-phy.yaml | 50 ++++++++++++++++++++++
1 file changed, 50 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml
diff --git a/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml
new file mode 100644
index 000000000000..be05020880bf
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml
@@ -0,0 +1,50 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/intel,lgm-sdxc-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Intel Lightning Mountain(LGM) SDXC PHY Device Tree Bindings
+
+maintainers:
+ - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@xxxxxxxxxxxxxxx>
+
+description: Binding for SDXC PHY
+
+properties:
+ compatible:
+ const: intel,lgm-sdxc-phy
+
+ intel,syscon:
+ description: phandle to the sdxc through syscon
+ $ref: '/schemas/types.yaml#/definitions/phandle'
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ maxItems: 1
+
+ "#phy-cells":
+ const: 0
+
+required:
+ - "#phy-cells"
+ - compatible
+ - intel,syscon
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ sdxc_phy: sdxc_phy {
+ compatible = "intel,lgm-sdxc-phy";
+ intel,syscon = <&sysconf>;
Rather than a phandle, can this be a child node of sysconf? You need a
binding for sysconf first anyways.
intel,syscon is phandle, emmc_phy is not child node of sysconf, access
emmc_phy
register over sysconf so made as reference here.
How do you access the emmc_phy registers? They are part of the sysconf
address space or the sysconf provides some sort of indirect register
access? In case of the former, then emmc_phy should be a child node.
That's actually fairly common.
Agreed!, you are correct. I have created two files one for syscon and
other one is for emmc-phy
Documentation/devicetree/bindings/phy/intel,syscon.yaml
Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml
As you said earlier mail, first syscon bindings to be there, sending the
patch as well.
Regards
Vadivel
Rob
