> -----Original Message----- > From: Andrew Murray <andrew.murray@xxxxxxx> > Sent: 2019年8月15日 19:54 > To: Xiaowei Bao <xiaowei.bao@xxxxxxx> > Cc: jingoohan1@xxxxxxxxx; gustavo.pimentel@xxxxxxxxxxxx; > bhelgaas@xxxxxxxxxx; robh+dt@xxxxxxxxxx; mark.rutland@xxxxxxx; > shawnguo@xxxxxxxxxx; Leo Li <leoyang.li@xxxxxxx>; kishon@xxxxxx; > lorenzo.pieralisi@xxxxxxx; arnd@xxxxxxxx; gregkh@xxxxxxxxxxxxxxxxxxx; > M.h. Lian <minghuan.lian@xxxxxxx>; Mingkai Hu <mingkai.hu@xxxxxxx>; > Roy Zang <roy.zang@xxxxxxx>; linux-pci@xxxxxxxxxxxxxxx; > devicetree@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; > linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; linuxppc-dev@xxxxxxxxxxxxxxxx > Subject: Re: [PATCH 02/10] PCI: designware-ep: Add the doorbell mode of > MSI-X in EP mode > > On Thu, Aug 15, 2019 at 04:37:08PM +0800, Xiaowei Bao wrote: > > Add the doorbell mode of MSI-X in EP mode. > > > > Signed-off-by: Xiaowei Bao <xiaowei.bao@xxxxxxx> > > --- > > drivers/pci/controller/dwc/pcie-designware-ep.c | 14 ++++++++++++++ > > drivers/pci/controller/dwc/pcie-designware.h | 14 ++++++++++++++ > > 2 files changed, 28 insertions(+) > > > > diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c > > b/drivers/pci/controller/dwc/pcie-designware-ep.c > > index 75e2955..e3a7cdf 100644 > > --- a/drivers/pci/controller/dwc/pcie-designware-ep.c > > +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c > > @@ -454,6 +454,20 @@ int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep > *ep, u8 func_no, > > return 0; > > } > > > > +int dw_pcie_ep_raise_msix_irq_doorbell(struct dw_pcie_ep *ep, u8 > func_no, > > + u16 interrupt_num) > > +{ > > + struct dw_pcie *pci = to_dw_pcie_from_ep(ep); > > + u32 msg_data; > > + > > + msg_data = (func_no << PCIE_MSIX_DOORBELL_PF_SHIFT) | > > + (interrupt_num - 1); > > + > > + dw_pcie_writel_dbi(pci, PCIE_MSIX_DOORBELL, msg_data); > > + > > + return 0; > > +} > > + > > int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no, > > u16 interrupt_num) > > Have I understood correctly that the hardware provides an alternative > mechanism that allows for raising MSI-X interrupts without the bother of > reading the capabilities registers? Yes, the hardware provide two way to MSI-X, please check the page 492 of DWC_pcie_dm_registers_4.30 Menu. MSIX_DOORBELL_OFF on page 492 0x948 Description: MSI-X Doorbell Register....> > > If so is there any good reason to keep dw_pcie_ep_raise_msix_irq? (And thus > use it in dw_plat_pcie_ep_raise_irq also)? I am not sure, but I think the dw_pcie_ep_raise_msix_irq function is not correct, because I think we can't get the MSIX table from the address ep->phys_base + tbl_addr, but I also don't know where I can get the correct MSIX table. > > > > { > > diff --git a/drivers/pci/controller/dwc/pcie-designware.h > > b/drivers/pci/controller/dwc/pcie-designware.h > > index 2b291e8..cd903e9 100644 > > --- a/drivers/pci/controller/dwc/pcie-designware.h > > +++ b/drivers/pci/controller/dwc/pcie-designware.h > > @@ -88,6 +88,11 @@ > > #define PCIE_MISC_CONTROL_1_OFF 0x8BC > > #define PCIE_DBI_RO_WR_EN BIT(0) > > > > +#define PCIE_MSIX_DOORBELL 0x948 > > +#define PCIE_MSIX_DOORBELL_PF_SHIFT 24 > > +#define PCIE_MSIX_DOORBELL_VF_SHIFT 16 > > +#define PCIE_MSIX_DOORBELL_VF_ACTIVE BIT(15) > > The _VF defines are not used, I'd suggest removing them. In fact, I will add the SRIOV support in this file, the SRIOV feature have verified In my board, but I need wait the EP framework SRIOV patch merge, so I defined these two macros. > > Thanks, > > Andrew Murray > > > + > > /* > > * iATU Unroll-specific register definitions > > * From 4.80 core version the address translation will be made by > > unroll @@ -399,6 +404,8 @@ int dw_pcie_ep_raise_msi_irq(struct > dw_pcie_ep *ep, u8 func_no, > > u8 interrupt_num); > > int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no, > > u16 interrupt_num); > > +int dw_pcie_ep_raise_msix_irq_doorbell(struct dw_pcie_ep *ep, u8 > func_no, > > + u16 interrupt_num); > > void dw_pcie_ep_reset_bar(struct dw_pcie *pci, enum pci_barno bar); > > #else static inline void dw_pcie_ep_linkup(struct dw_pcie_ep *ep) @@ > > -431,6 +438,13 @@ static inline int dw_pcie_ep_raise_msix_irq(struct > dw_pcie_ep *ep, u8 func_no, > > return 0; > > } > > > > +static inline int dw_pcie_ep_raise_msix_irq_doorbell(struct dw_pcie_ep > *ep, > > + u8 func_no, > > + u16 interrupt_num) > > +{ > > + return 0; > > +} > > + > > static inline void dw_pcie_ep_reset_bar(struct dw_pcie *pci, enum > > pci_barno bar) { } > > -- > > 2.9.5 > > > > > > _______________________________________________ > > linux-arm-kernel mailing list > > linux-arm-kernel@xxxxxxxxxxxxxxxxxxx > > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Flists > > .infradead.org%2Fmailman%2Flistinfo%2Flinux-arm-kernel&data=02% > 7C0 > > > 1%7Cxiaowei.bao%40nxp.com%7C8489493003bb48a0139d08d721773972% > 7C686ea1d > > > 3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637014668369499298&sd > ata=dyrXB > > > avljJBFUSNXW7K%2FRoXvwfWTE%2FoU2KMd1bZkJow%3D&reserved=0