Add DT bindings documentmation for the Clock of the LS1028A Display
output interface.
Signed-off-by: Wen He <wen.he_1@xxxxxxx>
---
.../devicetree/bindings/clock/fsl,plldig.txt | 26 +++++++++++++++++++
1 file changed, 26 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/fsl,plldig.txt
diff --git a/Documentation/devicetree/bindings/clock/fsl,plldig.txt b/Documentation/devicetree/bindings/clock/fsl,plldig.txt
new file mode 100644
index 000000000000..29c5a6117809
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/fsl,plldig.txt
@@ -0,0 +1,26 @@
+NXP QorIQ Layerscape LS1028A Display output interface Clock
+===========================================================
+
+Required properties:
+ - compatible: shall contain "fsl,ls1028a-plldig"
+ - reg: Physical base address and size of the block registers
+ - #clock-cells: shall contain 1.
+ - clocks: a phandle + clock-specifier pairs, here should be
+ specify the reference clock of the system
+
+
+Example:
+
+/ {
+ ...
+
+ dpclk: clock-controller@f1f0000 {
+ compatible = "fsl,ls1028a-plldig";
+ reg = <0x0 0xf1f0000 0x0 0xffff>;
+ #clock-cells = <1>;
+ clocks = <&osc_27m>;
+ };
+
+ ...
+};
+
--
2.17.1
