On Tue, Aug 06, 2019 at 10:14:39PM +0100, Robin Murphy wrote: > On 2019-08-06 9:52 pm, Vasily Khoruzhick wrote: > > On Tue, Aug 6, 2019 at 1:19 PM Harald Geyer <harald@xxxxxxxxx> wrote: > > > > > > Vasily Khoruzhick writes: > > > > On Tue, Aug 6, 2019 at 7:35 AM Robin Murphy <robin.murphy@xxxxxxx> wrote: > > > > > > > > > > On 06/08/2019 15:01, Vasily Khoruzhick wrote: > > > > > > Looks like PMU in A64 is broken, it generates no interrupts at all and > > > > > > as result 'perf top' shows no events. > > > > > > > > > > Does something like 'perf stat sleep 1' at least count cycles correctly? > > > > > It could well just be that the interrupt numbers are wrong... > > > > > > > > Looks like it does, at least result looks plausible: > > > > > > I'm using perf stat regularly (cache benchmarks) and it works fine. > > > > > > Unfortunately I wasn't aware that perf stat is a poor test for > > > the interrupts part of the node, when I added it. So I'm not too > > > surprised I got it wrong. > > > > > > However, it would be unfortunate if the node got removed completely, > > > because perf stat would not work anymore. Maybe we can only remove > > > the interrupts or just fix them even if the HW doesn't work? > > > > I'm not familiar with PMU driver. Is it possible to get it working > > without interrupts? > > Yup - you get a grumpy message from the driver, it will refuse sampling > events (the ones which weren't working anyway), and if you measure anything > for long enough that a counter overflows you'll get wonky results. But for > counting hardware events over relatively short periods it'll still do the > job. Even that's stupidly dodgy; a CPU_CYCLES event could easily overflow several times between the kernel sampling it, so you can lose billions of events without any idea that happened. For other PMUs we can fix that with a hrtimer, but I think for a CPU PMU it has to be at such a high frequency that it imposes a ridiculous overhead, even assuming we can choose a sufficient frequency. :/ Thanks, Mark.
