> -----Original Message-----
> From: Leonard Crestez <leonard.crestez@xxxxxxx>
> Sent: Thursday, July 4, 2019 3:53 AM
> To: Shawn Guo <shawnguo@xxxxxxxxxx>; Will Deacon <will@xxxxxxxxxx>; Frank
> Li <frank.li@xxxxxxx>
> Cc: Rob Herring <robh+dt@xxxxxxxxxx>; Andrey Smirnov
> <andrew.smirnov@xxxxxxxxx>; Mark Rutland <mark.rutland@xxxxxxx>;
> Aisheng Dong <aisheng.dong@xxxxxxx>; Fabio Estevam
> <fabio.estevam@xxxxxxx>; Jacky Bai <ping.bai@xxxxxxx>;
> devicetree@xxxxxxxxxxxxxxx; kernel@xxxxxxxxxxxxxx; dl-linux-imx <linux-
> imx@xxxxxxx>; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
> Subject: [PATCH 2/3] arm64: dts: imx8m: Add ddr-pmu nodes
>
> The same ddr perfomance counter IP from 8qxp is also available on imx8m
> series so add it to dts.
>
> Tested with `perf stat` and `memtester` on imx8mm-evk and obtained plausible
> results.
>
> Signed-off-by: Leonard Crestez <leonard.crestez@xxxxxxx>
Acked-by: Frank Li <frank.li@xxxxxxx>
> ---
> arch/arm64/boot/dts/freescale/imx8mm.dtsi | 7 +++++++
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 7 +++++++
> 2 files changed, 14 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index 232a7412755a..9a8d8cd21ef0 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -816,7 +816,14 @@
> <0x38880000 0xc0000>; /* GICR (RD_base +
> SGI_base) */
> #interrupt-cells = <3>;
> interrupt-controller;
> interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> };
> +
> + ddr-pmu@3d800000 {
> + compatible = "fsl,imx8mm-ddr-pmu", "fsl,imx8m-ddr-
> pmu";
> + reg = <0x3d800000 0x400000>;
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
> + };
> };
> };
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index d09b808eff87..fb0fdee5f889 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -1031,7 +1031,14 @@
> #interrupt-cells = <3>;
> interrupt-controller;
> interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-parent = <&gic>;
> };
> +
> + ddr-pmu@3d800000 {
> + compatible = "fsl,imx8mq-ddr-pmu", "fsl,imx8m-ddr-
> pmu";
> + reg = <0x3d800000 0x400000>;
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
> + };
> };
> };
> --
> 2.17.1
