On Mon, Jun 24, 2019 at 05:23:45PM +0200, Allan W. Nielsen wrote: > Hi Andrew, > > The 06/24/2019 16:26, Andrew Lunn wrote: > > > > Yeah, there are 2 ethernet controller ports (managed by the enetc driver) > > > > connected inside the SoC via SGMII links to 2 of the switch ports, one of > > > > these switch ports can be configured as CPU port (with follow-up patches). > > > > > > > > This configuration may look prettier on DSA, but the main restriction here > > > > is that the entire functionality is provided by the ocelot driver which is a > > > > switchdev driver. I don't think it would be a good idea to copy-paste code > > > > from ocelot to a separate dsa driver. > > > > > > > > > > We should probably make the ocelot driver a DSA driver then... > > An important part of DSA is being able to direct frames out specific > > ports when they ingress via the CPU port. Does the silicon support > > this? At the moment, i think it is using polled IO. > > That is supported, it requires a bit of initial configuration of the Chip, but > nothing big (I believe this configuration is part of Claudiu's change-set). > > But how do you envision this done? > > - Let the existing SwitchDev driver and the DSA driver use a set of common > functions. > - Convert the existing Ocelot driver from SwitchDev to DSA > - Fork (copy) the existing driver of Ocelot, and modify it as needed for the > Felix driver > > My guess is the first one, but I would like to understand what you have in mind. I don't know the various architectures the switch is used in. But it does seem like a core library, and then a switchdev wrapper for Ocelot and a DSA wrapper for Felix would make sense. Andrew
