On Wed, 12 Jun 2019, Marc Zyngier wrote: > On Wed, 12 Jun 2019 08:14:16 +0100, > Thomas Gleixner <tglx@xxxxxxxxxxxxx> wrote: > > On Mon, 10 Jun 2019, Leonard Crestez wrote: > > > On 6/10/2019 5:08 PM, Marc Zyngier wrote: > > > > Nobody is talking about performance here. It is strictly about > > > > correctness, and what I read about this system is that it cannot > > > > reliably use cpuidle. > > > My argument was that it's fine if PPIs and LPIs are broken as long as > > > they're not used: > > > > > > * PPIs are only used for local timer which is not used for wakeup. > > > > Huch? The timer has to bring the CPU out of idle as any other > > interrupt. > > They use a separate hack for that, pretending that the timer is > stopped during idle (it isn't), and setup a broadcast timer when > entering idle. That timer uses an interrupt that can wake-up the > target CPU, and all is well in the world. Sort of. > > Of course, this breaks as PPIs are not only used by the timer, but > also by a number of other HW bits (PMU, GIC, guest and hypervisor > timers), and they don't have corresponding hacks to back them up. Eew.
