> -----Original Message----- > From: Rasmus Villemoes <Rasmus.Villemoes@xxxxxxxxx> > Sent: Monday, June 3, 2019 2:54 PM > To: devicetree@xxxxxxxxxxxxxxx; Qiang Zhao <qiang.zhao@xxxxxxx>; Leo Li > <leoyang.li@xxxxxxx> > Cc: linuxppc-dev@xxxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; > linux-kernel@xxxxxxxxxxxxxxx; Rob Herring <robh+dt@xxxxxxxxxx>; Scott > Wood <oss@xxxxxxxxxxxx>; Christophe Leroy <christophe.leroy@xxxxxx>; > Mark Rutland <mark.rutland@xxxxxxx>; jocke@xxxxxxxxxxxx > <joakim.tjernlund@xxxxxxxxxxxx> > Subject: Re: [PATCH v3 0/6] soc/fsl/qe: cleanups and new DT binding > > On 13/05/2019 13.14, Rasmus Villemoes wrote: > > This small series consists of some small cleanups and simplifications > > of the QUICC engine driver, and introduces a new DT binding that makes > > it much easier to support other variants of the QUICC engine IP block > > that appears in the wild: There's no reason to expect in general that > > the number of valid SNUMs uniquely determines the set of such, so it's > > better to simply let the device tree specify the values (and, > > implicitly via the array length, also the count). > > > > Which tree should this go through? > > Ping? These patches should be ready to go in, but I don't know who is > supposed to pick them up. I can pick them up through the soc/fsl tree. Regards, Leo
