RE: [PATCH V2 2/3] clk: imx: Add support for i.MX8MN clock driver

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Hi, Abel

> -----Original Message-----
> From: Abel Vesa
> Sent: Monday, June 3, 2019 3:30 PM
> To: Anson Huang <anson.huang@xxxxxxx>
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> <aisheng.dong@xxxxxxx>; Jacky Bai <ping.bai@xxxxxxx>;
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> Subject: Re: [PATCH V2 2/3] clk: imx: Add support for i.MX8MN clock driver
> 
> On 19-06-03 09:35:02, Anson.Huang@xxxxxxx wrote:
> > From: Anson Huang <Anson.Huang@xxxxxxx>
> >
> > This patch adds i.MX8MN clock driver support.
> >
> > Signed-off-by: Anson Huang <Anson.Huang@xxxxxxx>
> > ---
> > Changes since V1:
> > 	- add GPIOx clocks.
> 
> ...
> 
> > +static struct imx_pll14xx_clk imx8mn_sys_pll __initdata = {
> > +		.type = PLL_1416X,
> > +		.rate_table = imx8mn_pll1416x_tbl,
> > +};
> > +
> > +static const char *pll_ref_sels[] = { "osc_24m", "dummy", "dummy",
> > +"dummy", };
> 
> All of these should be "static const char * const ".

OK.

> 
> > +static const char *audio_pll1_bypass_sels[] = {"audio_pll1",
> > +"audio_pll1_ref_sel", }; static const char *audio_pll2_bypass_sels[]
> > += {"audio_pll2", "audio_pll2_ref_sel", };
> 
> ...
> 
> > +	clk_data.clks = clks;
> > +	clk_data.clk_num = ARRAY_SIZE(clks);
> > +	ret = of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
> > +	if (ret < 0) {
> > +		pr_err("failed to register clks for i.MX8MN\n");
> > +		return -EINVAL;
> > +	}
> > +
> > +	imx_register_uart_clocks(uart_clks);
> > +
> > +	return 0;
> > +}
> > +CLK_OF_DECLARE_DRIVER(imx8mn, "fsl,imx8mn-ccm",
> imx8mn_clocks_init);
> 
> Any reason why this cannot be a platform driver ?

It should can be, I just did NOT take care of it, 8MQ uses platform driver model, while
8MM does NOT, I will modify both of them to use platform driver model.

Thanks,
Anson.

> 
> > --
> > 2.7.4
> >




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