RE: [PATCH 2/3] arm64: dts: freescale: Add i.MX8MN dtsi support

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Hi, Fabio

> -----Original Message-----
> From: Fabio Estevam <festevam@xxxxxxxxx>
> Sent: Friday, May 31, 2019 7:40 PM
> To: Anson Huang <anson.huang@xxxxxxx>
> Cc: Rob Herring <robh+dt@xxxxxxxxxx>; Mark Rutland
> <mark.rutland@xxxxxxx>; Shawn Guo <shawnguo@xxxxxxxxxx>; Sascha
> Hauer <s.hauer@xxxxxxxxxxxxxx>; Sascha Hauer <kernel@xxxxxxxxxxxxxx>;
> Andrey Smirnov <andrew.smirnov@xxxxxxxxx>; Manivannan Sadhasivam
> <manivannan.sadhasivam@xxxxxxxxxx>; Bruno Thomsen
> <bruno.thomsen@xxxxxxxxx>; Aisheng Dong <aisheng.dong@xxxxxxx>;
> Jacky Bai <ping.bai@xxxxxxx>; Leo Li <leoyang.li@xxxxxxx>; Lucas Stach
> <l.stach@xxxxxxxxxxxxxx>; Pankaj Bansal <pankaj.bansal@xxxxxxx>;
> Bhaskar Upadhaya <bhaskar.upadhaya@xxxxxxx>; Pramod Kumar
> <pramod.kumar_1@xxxxxxx>; Vabhav Sharma <vabhav.sharma@xxxxxxx>;
> Leonard Crestez <leonard.crestez@xxxxxxx>; open list:OPEN FIRMWARE
> AND FLATTENED DEVICE TREE BINDINGS <devicetree@xxxxxxxxxxxxxxx>;
> linux-kernel <linux-kernel@xxxxxxxxxxxxxxx>; moderated list:ARM/FREESCALE
> IMX / MXC ARM ARCHITECTURE <linux-arm-kernel@xxxxxxxxxxxxxxxxxxx>; dl-
> linux-imx <linux-imx@xxxxxxx>
> Subject: Re: [PATCH 2/3] arm64: dts: freescale: Add i.MX8MN dtsi support
> 
> On Thu, May 30, 2019 at 6:45 AM <Anson.Huang@xxxxxxx> wrote:
> 
> > +                       gpio1: gpio@30200000 {
> > +                               compatible = "fsl,imx8mn-gpio", "fsl,imx35-gpio";
> > +                               reg = <0x30200000 0x10000>;
> > +                               interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
> > +                                            <GIC_SPI 65
> > + IRQ_TYPE_LEVEL_HIGH>;
> 
> No GPIO clocks entries?

Just noticed this, the internal bring-up branch's clock driver does NOT have it,
I will add them in V2, thanks for pointing out this. 

> 
> > +                       usbphynop1: usbphynop1 {
> > +                               compatible = "usb-nop-xceiv";
> > +                               clocks = <&clk IMX8MN_CLK_USB_PHY_REF>;
> > +                               assigned-clocks = <&clk IMX8MN_CLK_USB_PHY_REF>;
> > +                               assigned-clock-parents = <&clk
> IMX8MN_SYS_PLL1_100M>;
> > +                               clock-names = "main_clk";
> > +                       };
> 
>  usbphynop1 does not have any registers associated, so it should be placed
> outside the soc.
> 
> Building with W=1 should warn you about that.
> 

OK, I will move them to outside of soc.

> > +                       usbphynop2: usbphynop2 {
> > +                               compatible = "usb-nop-xceiv";
> > +                               clocks = <&clk IMX8MN_CLK_USB_PHY_REF>;
> > +                               assigned-clocks = <&clk IMX8MN_CLK_USB_PHY_REF>;
> > +                               assigned-clock-parents = <&clk
> IMX8MN_SYS_PLL1_100M>;
> > +                               clock-names = "main_clk";
> > +                       };
> > +
> 
> Ditto

OK, I will move them to outside of soc.

Thanks,
Anson.





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