Retrieve and enable the clock gate related to PL pins. Signed-off-by: Boris BREZILLON <boris.brezillon@xxxxxxxxxxxxxxxxxx> --- drivers/pinctrl/pinctrl-sunxi.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/pinctrl/pinctrl-sunxi.c b/drivers/pinctrl/pinctrl-sunxi.c index 64dffc8..da76ceb 100644 --- a/drivers/pinctrl/pinctrl-sunxi.c +++ b/drivers/pinctrl/pinctrl-sunxi.c @@ -898,6 +898,13 @@ static int sunxi_pinctrl_probe(struct platform_device *pdev) return -ENOMEM; pctl->get_membase = sun6i_a31_pinctrl_get_membase; + clk = devm_clk_get(&pdev->dev, "pioL_clk"); + if (IS_ERR(clk)) + return PTR_ERR(clk); + + ret = clk_prepare_enable(clk); + if (ret) + return ret; } else { pctl->get_membase = sunxi_pinctrl_get_membase; } -- 1.8.3.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html