From: Boris Brezillon <bbrezillon@xxxxxxxxxx> On Tue, 2019-02-12 at 08:38:09 UTC, Vignesh R wrote: > Cadence OSPI controller IP supports Octal IO (x8 IO lines), > It also has an integrated PHY. IP register layout is very > similar to existing QSPI IP except for additional bits to support Octal > and Octal DDR mode. Therefore, extend current driver to support Octal > mode. Only Octal SDR read (1-1-8)mode is supported for now. > > Tested with mt35xu512aba Octal flash on TI's AM654 EVM. > > Signed-off-by: Vignesh R <vigneshr@xxxxxx> > Reviewed-by: Tudor Ambarus <tudor.ambarus@xxxxxxxxxxxxx> Applied to http://git.infradead.org/linux-mtd.git spi-nor/next, thanks. Boris
