On Mon, 2019-02-11 at 09:23 +0800, Shawn Guo wrote: > On Thu, Feb 07, 2019 at 09:00:44PM +0000, Trent Piepho wrote: > > On Mon, 2019-01-07 at 14:22 +0100, Stefan Agner wrote: > > > Allow to use DMA for SPI by adding the appropriate DMA properites > > > to the ecspi nodes. > > > > > > Signed-off-by: Stefan Agner <stefan@xxxxxxxx> > > > > > There's an interesting thing that happens when DMA is used. The SPI > > clock changes. Instead of cycling continuously for the entire > > transfer, it instead clocks out 8 bits, then pauses for 4 bit times, > > then the next byte, etc. So it's a net of about 50% slower. The pause > > between bytes scales with spi frequency to always be about 4 bits. > > > > I think DMA on imx not be ready for prime time yet. > > I dropped both patches from my tree. > I've had more time to test. Without DMA, I can reload my FPGA hundreds of times and get days of uptime using linux-next. With DMA, loading is unreliable. The higher the SPI speed, the less reliable it is. Unfortunately, it's hard to duplicate the problem with a small amount of data, and with a large amount of data I can't examine it in depth enough to determine if the problem is related to SPI bus timing or IMX sDMA sending the wrong bytes to the spi controller. Using DMA with SPI causes kernel panics. Not always immediately, but after using DMA it's a smaller of minutes before something crashes. The backtraces are all over the place and don't usually point back into SPI. It does seem like they usually hit something has allocated or is allocating DMA memory.
