RE: [PATCH 3/5] media: dt-bindings: media: rcar_vin: Add r8a774a1 support

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Hello Mauro,

This is a gentle reminder.

Thanks,
Fab

> From: Fabrizio Castro
> Sent: 08 November 2018 14:26
> Subject: RE: [PATCH 3/5] media: dt-bindings: media: rcar_vin: Add r8a774a1 support
>
> Hello Mauro,
>
> Does this patch look ok to you?
>
> Thanks,
> Fab
>
> > From: linux-renesas-soc-owner@xxxxxxxxxxxxxxx <linux-renesas-soc-owner@xxxxxxxxxxxxxxx> On Behalf Of Biju Das
> > Sent: 10 September 2018 15:31
> > Subject: [PATCH 3/5] media: dt-bindings: media: rcar_vin: Add r8a774a1 support
> >
> > Document RZ/G2M (R8A774A1) SoC bindings.
> >
> > The RZ/G2M SoC is similar to R-Car M3-W (R8A7796).
> >
> > Signed-off-by: Biju Das <biju.das@xxxxxxxxxxxxxx>
> > Reviewed-by: Fabrizio Castro <fabrizio.castro@xxxxxxxxxxxxxx>
> > ---
> >  Documentation/devicetree/bindings/media/rcar_vin.txt | 5 +++--
> >  1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/media/rcar_vin.txt b/Documentation/devicetree/bindings/media/rcar_vin.txt
> > index 2f42005..8c81689 100644
> > --- a/Documentation/devicetree/bindings/media/rcar_vin.txt
> > +++ b/Documentation/devicetree/bindings/media/rcar_vin.txt
> > @@ -12,6 +12,7 @@ on Gen3 platforms to a CSI-2 receiver.
> >   - compatible: Must be one or more of the following
> >     - "renesas,vin-r8a7743" for the R8A7743 device
> >     - "renesas,vin-r8a7745" for the R8A7745 device
> > +   - "renesas,vin-r8a774a1" for the R8A774A1 device
> >     - "renesas,vin-r8a7778" for the R8A7778 device
> >     - "renesas,vin-r8a7779" for the R8A7779 device
> >     - "renesas,vin-r8a7790" for the R8A7790 device
> > @@ -58,9 +59,9 @@ The per-board settings Gen2 platforms:
> >      - data-enable-active: polarity of CLKENB signal, see [1] for
> >        description. Default is active high.
> >
> > -The per-board settings Gen3 platforms:
> > +The per-board settings Gen3 and RZ/G2 platforms:
> >
> > -Gen3 platforms can support both a single connected parallel input source
> > +Gen3 and RZ/G2 platforms can support both a single connected parallel input source
> >  from external SoC pins (port@0) and/or multiple parallel input sources
> >  from local SoC CSI-2 receivers (port@1) depending on SoC.
> >
> > --
> > 2.7.4




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