Re: [PATCH] mips: gpio: mscc_sgpio: Add DT bindings documentation

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Hi Linus!

Thank you very much for your feedback - and sorry about the delay in 
getting back to you.

I will send you a v2 updated version addressing you comments. Thank you!

See below for comments

---Lars

> From: Linus Walleij <linus.walleij@xxxxxxxxxx>
> Date: Fri, 7 Dec 2018 10:43:38 +0100
> Message-ID: <CACRpkdZ47tELuJR3DG-
> d8tsvz4ez_j6TxCYiiGT3L01CJ1LSTA@xxxxxxxxxxxxxx>
> Subject: Re: [PATCH] mips: gpio: mscc_sgpio: Add DT bindings
> documentation
> To: lars.povlsen@xxxxxxxxxxxxx
> Cc: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
> <devicetree@xxxxxxxxxxxxxxx>,
> 	Gregory Clement <gregory.clement@xxxxxxxxxxx>
> 
> Hi Lars,
> 
> thanks for your patch!
> 
> On Mon, Nov 26, 2018 at 1:22 PM Lars Povlsen
> <lars.povlsen@xxxxxxxxxxxxx> wrote:
> 
> > +MSCC Serial GPIO driver
> 
> Expand the acronym please, if IIUC this is
> "Microsemi Corporation (MSCC) Serial GPIO driver"

Will do.

> 
> > +- mscc,sgpio-frequency: The frequency at which the serial bitstream
> is
> > +  generated and sampled. Default: 12500000 (Hz).
> 
> Uhm what is a serial bitstream in this context, I am lost.
> Please elaborate.

I added some background details to the description.

> 
> > +- mscc,sgpio-bitcount: The number of bits enabled per
> > +  port. (1-4). Default: 2.
> 
> Can't you just use the standard "ngpios" property for this?
> See
> Documentation/devicetree/bindings/gpio/gpio.txt
> 

I dropped this property in favor of deriving from gpio-ranges and
(optionally) ngpios as proposed.

> Why is this a global setting for all ports and not per-port?
> 
> > +- mscc,sgpio-ports: A bitmask (32 bits) of which ports are enabled in
> > +  the serialized gpio stream. Default: 0xFFFFFFFF.
> 
> I don't understand this either. Are there up to 32 ports?
> (Also referred to as "banks") with 1-4 GPIOs each?

Yes each port represent 1-4 GPIOs. Changed to:

- mscc,sgpio-ports: A bitmask (32 bits) of which ports are enabled in
  the serialized gpio stream. One 'port' will transport from 1 to 4
  gpio bits. Default: 0xFFFFFFFF.


Again, thank you very much for your comments - they are highly appreciated.

---Lars

> 
> Yours,
> Linus Walleij
> -------------------- End of forwarded message --------------------
> 
> --
> Gregory Clement, Bootlin
> Embedded Linux and Kernel engineering
> http://bootlin.com




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