Re: [PATCH v3 6/6] media: mt9m111: allow to setup pixclk polarity

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On Wed, Nov 28, 2018 at 09:29:01AM +0100, Marco Felsch wrote:
> On 18-11-27 23:15, Sakari Ailus wrote:
> > On Tue, Nov 27, 2018 at 11:02:53AM +0100, Marco Felsch wrote:
> > > From: Enrico Scholz <enrico.scholz@xxxxxxxxxxxxxxxxx>
> > > 
> > > The chip can be configured to output data transitions on the
> > > rising or falling edge of PIXCLK (Datasheet R58:1[9]), default is on the
> > > falling edge.
> > > 
> > > Parsing the fw-node is made in a subfunction to bundle all (future)
> > > dt-parsing / fw-parsing stuff.
> > > 
> > > Signed-off-by: Enrico Scholz <enrico.scholz@xxxxxxxxxxxxxxxxx>
> > > (m.grzeschik@xxxxxxxxxxxxxx: Fix inverting clock. INV_PIX_CLOCK bit is set
> > > per default. Set bit to 0 (enable mask bit without value) to enable
> > > falling edge sampling.)
> > > Signed-off-by: Michael Grzeschik <m.grzeschik@xxxxxxxxxxxxxx>
> > > (m.felsch@xxxxxxxxxxxxxx: use fwnode helpers)
> > > (m.felsch@xxxxxxxxxxxxxx: mv fw parsing into own function)
> > > (m.felsch@xxxxxxxxxxxxxx: adapt commit msg)
> > > Signed-off-by: Marco Felsch <m.felsch@xxxxxxxxxxxxxx>
> > 
> > This one as well:
> 
> Sorry for that, I forget to adapt the Kconfig to often. Thanks for your
> fix.

No worries. I hope we'll have automated compile testing in not too distant
future...

-- 
Sakari Ailus
sakari.ailus@xxxxxxxxxxxxxxx



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