于 2018年11月14日 GMT+08:00 下午6:21:33, Chen-Yu Tsai <wens@xxxxxxxx> 写到:
>Hi,
>
>On Thu, Oct 4, 2018 at 8:30 PM Icenowy Zheng <icenowy@xxxxxxx> wrote:
>>
>> Allwinner H6 has two USB2 ports, one OTG and one host-only.
>>
>> Add device tree nodes related to them.
>>
>> Signed-off-by: Icenowy Zheng <icenowy@xxxxxxx>
>> Reviewed-by: Chen-Yu Tsai <wens@xxxxxxxx>
>> ---
>> No changes in v4.
>>
>> Changes in v3:
>> - Removed the wrongly introduced usb3phy node.
>> - Added Chen-Yu's Review tag.
>>
>> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 81
>++++++++++++++++++++
>> 1 file changed, 81 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
>b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
>> index 040828d2e2c0..3d60af6cb3ae 100644
>> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
>> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
>> @@ -258,6 +258,87 @@
>> status = "disabled";
>> };
>>
>> + usb2otg: usb@5100000 {
>> + compatible = "allwinner,sun8i-a33-musb";
>
>I added an SoC-specific compatible: "allwinner,sun50i-h6-musb".
>
>I'm also curious as to whether the MUSB controller was tested or not,
>since Allwinner now has EHCI/OHCI host pairs for host mode, and the
>Pine H64
>only does host mode.
USB plug-in detection relays on MUSB if it's enabled.
>
>> + reg = <0x05100000 0x0400>;
>> + clocks = <&ccu CLK_BUS_OTG>;
>> + resets = <&ccu RST_BUS_OTG>;
>> + interrupts = <GIC_SPI 23
>IRQ_TYPE_LEVEL_HIGH>;
>> + interrupt-names = "mc";
>> + phys = <&usb2phy 0>;
>> + phy-names = "usb";
>> + extcon = <&usb2phy 0>;
>> + status = "disabled";
>> + };
>> +
>> + usb2phy: phy@5100400 {
>> + compatible = "allwinner,sun50i-h6-usb-phy";
>> + reg = <0x05100400 0x14>,
>> + <0x05101800 0x4>,
>> + <0x05311800 0x4>;
>> + reg-names = "phy_ctrl",
>> + "pmu0",
>> + "pmu3";
>> + clocks = <&ccu CLK_USB_PHY0>,
>> + <&ccu CLK_USB_PHY3>;
>> + clock-names = "usb0_phy",
>> + "usb3_phy";
>> + resets = <&ccu RST_USB_PHY0>,
>> + <&ccu RST_USB_PHY3>;
>> + reset-names = "usb0_reset",
>> + "usb3_reset";
>> + status = "disabled";
>> + #phy-cells = <1>;
>> + };
>> +
>> + ehci0: usb@5101000 {
>> + compatible = "allwinner,sun50i-h6-ehci",
>"generic-ehci";
>> + reg = <0x05101000 0x100>;
>> + interrupts = <GIC_SPI 24
>IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&ccu CLK_BUS_OHCI0>,
>> + <&ccu CLK_BUS_EHCI0>,
>> + <&ccu CLK_USB_OHCI0>;
>> + resets = <&ccu RST_BUS_OHCI0>,
>> + <&ccu RST_BUS_EHCI0>;
>> + status = "disabled";
>> + };
>> +
>> + ohci0: usb@5101400 {
>> + compatible = "allwinner,sun50i-h6-ohci",
>"generic-ohci";
>> + reg = <0x05101400 0x100>;
>> + interrupts = <GIC_SPI 25
>IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&ccu CLK_BUS_OHCI0>,
>> + <&ccu CLK_USB_OHCI0>;
>> + resets = <&ccu RST_BUS_OHCI0>;
>> + status = "disabled";
>> + };
>> +
>> + ehci3: usb@5311000 {
>> + compatible = "allwinner,sun50i-h6-ehci",
>"generic-ehci";
>> + reg = <0x05311000 0x100>;
>> + interrupts = <GIC_SPI 28
>IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&ccu CLK_BUS_OHCI3>,
>> + <&ccu CLK_BUS_EHCI3>,
>> + <&ccu CLK_USB_OHCI3>;
>> + resets = <&ccu RST_BUS_OHCI3>,
>> + <&ccu RST_BUS_EHCI3>;
>> + phys = <&usb2phy 3>;
>> + phy-names = "usb";
>> + status = "disabled";
>> + };
>> +
>> + ohci3: usb@5311400 {
>> + compatible = "allwinner,sun50i-h6-ohci",
>"generic-ohci";
>> + reg = <0x05311400 0x100>;
>> + interrupts = <GIC_SPI 29
>IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&ccu CLK_BUS_OHCI3>,
>> + <&ccu CLK_USB_OHCI3>;
>> + resets = <&ccu RST_BUS_OHCI3>;
>> + phys = <&usb2phy 3>;
>> + phy-names = "usb";
>> + status = "disabled";
>> + };
>> +
>
>This didn't apply cleanly due to the new HDMI nodes. I fixed it up
>locally.
>
>ChenYu
>
>> r_ccu: clock@7010000 {
>> compatible = "allwinner,sun50i-h6-r-ccu";
>> reg = <0x07010000 0x400>;
>> --
>> 2.18.0
>>
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