Quoting Jiada Wang (2018-10-31 05:00:49)
> On 2018/10/30 3:29, Stephen Boyd wrote:
> > Quoting jiada_wang@xxxxxxxxxx (2018-10-25 00:23:47)
> >> +Required Properties:
> >> + - compatible: Must be "renesas,clk-avb"
> >> + - reg: Base address and length of the memory resource used by the AVB
> >> + - #clock-cells: Must be 1
> >> +
> >> +Example
> >> +-------
> >> +
> >> + clk_avb: avb-clock@ec5a011c {
> >> + compatible = "renesas,clk-avb";
> >> + reg = <0 0xec5a011c 0 0x24>;
> > This is an odd register offset. Is this just one clk inside of a larger
> > clk controller?
> >
> Yes, avb_counter clock is part of Audio Clock Generator reg: <0
> 0xec5a0000 0 0x140>,
> but "adg" has already been declared in R-Car GEN2/GEN3 SoC .dtsi file,
> with reg: <0 0xec5a0000 0 0x100>,
> which leaves <0 0xec5a0100 0 0x140> currently not used by any module.
>
So why can't we expand the register size in the dts file and update the
audio clock generator driver to register this avb clock too? Presumably
the mapping is large enough to cover the clk registers already so it is
more of a formality to expand the register size than a requirement.
