On some SoCs(e.g. MX7ULP), GPIO clock is gatable and maybe
disabled by default. Users have to make sure it's enabled before
being able to access controller registers, otherwise an external
abort error may occur. Let's add the optional clocks property to
handle this case.
For ULP GPIO clock, it includes two separate clocks: one is for
GPIO controller Input/Output function clock while another is
GPIO port control clock for interrupt function.
Cc: Linus Walleij <linus.walleij@xxxxxxxxxx>
Cc: Mark Rutland <mark.rutland@xxxxxxx>
Cc: Stefan Agner <stefan@xxxxxxxx>
Cc: linux-gpio@xxxxxxxxxxxxxxx
Cc: devicetree@xxxxxxxxxxxxxxx
Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
Signed-off-by: Dong Aisheng <aisheng.dong@xxxxxxx>
---
v2->v3:
* no changes
v1->v2:
* new patch
---
Documentation/devicetree/bindings/gpio/gpio-vf610.txt | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpio/gpio-vf610.txt b/Documentation/devicetree/bindings/gpio/gpio-vf610.txt
index 0ccbae4..ae254aa 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-vf610.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-vf610.txt
@@ -24,6 +24,12 @@ Required properties for GPIO node:
4 = active high level-sensitive.
8 = active low level-sensitive.
+Optional properties:
+-clocks: Must contain an entry for each entry in clock-names.
+ See common clock-bindings.txt for details.
+-clock-names: A list of clock names. For imx7ulp, it must contain
+ "gpio", "port".
+
Note: Each GPIO port should have an alias correctly numbered in "aliases"
node.
--
2.7.4
