The interconnect API provides an interface for consumer drivers to express their bandwidth needs in the SoC. This data is aggregated and the on-chip interconnect hardware is configured to the appropriate power/performance profile. MDSS is one of the interconnect consumers which uses the interconnect APIs to get the path between endpoints and set its bandwidth requirements for the given interconnected path. Subsequently, there is a clean up patch to remove all the references of the DPU custom bus scaling. There is corresponding DT patch with the source and destination ports defined for display driver which will be sent separately. Sravanthi Kollukuduru (3): drm/msm/dpu: clean up references of DPU custom bus scaling drm/msm/dpu: Integrate interconnect API in MDSS dt-bindings: msm/disp: Introduce interconnect bindings for MDSS on SDM845 .../devicetree/bindings/display/msm/dpu.txt | 8 ++ drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 157 +++++++++------------ drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 4 +- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 56 +++++++- drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c | 47 ++---- drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h | 68 --------- drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 21 +-- 8 files changed, 143 insertions(+), 219 deletions(-) -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project