RE: [PATCH 0/4] Add i.MX6ULZ SoC support

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Hi, Stefan

Anson Huang
Best Regards!


> -----Original Message-----
> From: Stefan Wahren <stefan.wahren@xxxxxxxx>
> Sent: Tuesday, September 18, 2018 3:38 PM
> To: Anson Huang <anson.huang@xxxxxxx>; robh+dt@xxxxxxxxxx;
> mark.rutland@xxxxxxx; shawnguo@xxxxxxxxxx; s.hauer@xxxxxxxxxxxxxx;
> kernel@xxxxxxxxxxxxxx; Fabio Estevam <fabio.estevam@xxxxxxx>;
> linux@xxxxxxxxxxxxxxx; mturquette@xxxxxxxxxxxx; sboyd@xxxxxxxxxx; Jacky
> Bai <ping.bai@xxxxxxx>; A.s. Dong <aisheng.dong@xxxxxxx>;
> devicetree@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx;
> linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; linux-clk@xxxxxxxxxxxxxxx
> Cc: dl-linux-imx <linux-imx@xxxxxxx>
> Subject: Re: [PATCH 0/4] Add i.MX6ULZ SoC support
> 
> Hi Anson,
> 
> Am 18.09.2018 um 08:19 schrieb Anson Huang:
> > This patch set adds i.MX6ULZ SoC support, i.MX6ULZ is a new SoC of
> > i.MX6 family, compared to i.MX6ULL, it removes below modules:
> >
> >     - UART5/UART6/UART7/UART8;
> >     - PWM5/PWM6/PWM7/PWM8;
> >     - eCSPI3/eCSPI4;
> >     - CAN1/CAN2;
> >     - FEC1/FEC2;
> >     - I2C3/I2C4;
> >     - EPIT2;
> >     - LCDIF;
> >     - GPT2;
> >     - TSC;
> >
> > And i.MX6ULZ has same soc_id as i.MX6ULL, but SRC_SBMR2 bit[6] is to
> > differentiate i.MX6ULZ from i.MX6ULL, 1'b1 means i.MX6ULZ and
> > 1'b0 means i.MX6ULL. i.MX6ULZ reuse most of i.MX6UL/i.MX6ULL code,
> > just add the new CPU type and remove those non-exist modules from dtb.
> >
> > Anson Huang (4):
> >   ARM: dts: imx: add i.mx6ulz and i.mx6ulz 14x14 evk support
> >   ARM: imx: add i.mx6ulz msl support
> >   clk: imx6ul: add i.mx6ulz support
> >   dt-bindings: arm: add compatible for i.MX6ULZ 14x14 EVK board
> >
> >
> 
> i recommend the following patch order:
> ARM: imx: add i.mx6ulz msl support
> clk: imx6ul: add i.mx6ulz support
> dt-bindings: arm: add compatible for i.MX6ULZ 14x14 EVK board
> ARM: dts: imx: add i.mx6ulz and i.mx6ulz 14x14 evk support
> 
> Stefan
 
Thanks, I resend the V2 patch set with the patch order you recommended.

Anson.





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