On Fri, 2018-08-24 at 21:34 +0800, Jian Hu wrote: > > > > I am confued about aoclk81's parent clocks. > > I can not get the example of axg audio clock driver, Could you provide > the link? Had it merged into clk-meson.git? Yes and mainline as well : drivers/clk/meson/axg-audio.c Basically this driver is creating bypass input clocks (audio_pclk, mst_in[0-9], etc...) . This allows to collect input clocks from DT (like any consumer should) will keeping constant in the controller clock tree. >From what I've seen of your controller drivers, the EE controller should have one input, the AO should have 3.
