This adds the necessary nodes to add pin configuration for the UART0 of that board. Signed-off-by: Michel Pollet <michel.pollet@xxxxxxxxxxxxxx> --- arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts index 4e57ae2..039ec2e 100644 --- a/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts +++ b/arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts @@ -8,6 +8,8 @@ /dts-v1/; +#include <dt-bindings/pinctrl/r9a06g032-pinctrl.h> + #include "r9a06g032.dtsi" / { @@ -23,6 +25,17 @@ }; }; +&pinctrl { + pinsuart0: pinsuart0 { + renesas,rzn1-pinmux-ids = < + RZN1_MUX(103, UART0_I) /* UART0_TXD */ + RZN1_MUX(104, UART0_I) /* UART0_RXD */ + >; + }; +}; + &uart0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinsuart0>; }; -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html