Hi Geert, On 11 June 2018 11:01, Geert wrote: > Hi Michel, > > On Tue, Jun 5, 2018 at 10:36 AM Michel Pollet > <michel.pollet@xxxxxxxxxxxxxx> wrote: > > The Renesas R9A06G032 SYSCTRL node description. > > > > Signed-off-by: Michel Pollet <michel.pollet@xxxxxxxxxxxxxx> > > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/clock/renesas,r9a06g032- > sysctr > > +++ l.txt > > @@ -0,0 +1,32 @@ > > +* Renesas R9A06G032 SYSCTRL > > + > > +Required Properties: > > + > > + - compatible: Must be: > > + - "renesas,r9a06g032-sysctrl" > > + - reg: Base address and length of the SYSCTRL IO block. > > + - #clock-cells: Must be 1 > > (repeating myself) No clocks/clock-names for the external clock inputs? > > "RZ/N1 has 3 clock sources, 1 reference clock inputs for RGMII, and 2 > reference clock outputs for RMII/MII." Well, I'm trying to keep the binding as simple as possible, to dodge any further discussion. Adding these will be possible later, I don't need them for the moment anyway. > > The rest looks fine to me. > Thanks! Did you have a chance to review the clock driver proper? I'm pondering sending a v9 since it's been a week (with very minor changes) -- but I don't want to interrupt if you were in the process of reviewing... Cheers, Michel > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux- > m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709. ��.n��������+%������w��{.n����z�{��ܨ}���Ơz�j:+v�����w����ޙ��&�)ߡ�a����z�ޗ���ݢj��w�f