On Sat, Apr 28, 2018 at 02:56:42AM +0800, Dong Aisheng wrote:
> Add imx8qxp clock binding doc.
>
> Cc: Shawn Guo <shawnguo@xxxxxxxxxx>
> Cc: Sascha Hauer <kernel@xxxxxxxxxxxxxx>
> Cc: Fabio Estevam <fabio.estevam@xxxxxxx>
> Cc: Stephen Boyd <sboyd@xxxxxxxxxx>
> Cc: Michael Turquette <mturquette@xxxxxxxxxxxx>
> Cc: Rob Herring <robh+dt@xxxxxxxxxx>
> Cc: Mark Rutland <mark.rutland@xxxxxxx>
> Cc: devicetree@xxxxxxxxxxxxxxx
> Signed-off-by: Dong Aisheng <aisheng.dong@xxxxxxx>
> ---
> .../devicetree/bindings/clock/imx8qxp-clk.txt | 39 +++
> include/dt-bindings/clock/imx8qxp-clock.h | 362 +++++++++++++++++++++
> 2 files changed, 401 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/imx8qxp-clk.txt
> create mode 100644 include/dt-bindings/clock/imx8qxp-clock.h
>
> diff --git a/Documentation/devicetree/bindings/clock/imx8qxp-clk.txt b/Documentation/devicetree/bindings/clock/imx8qxp-clk.txt
> new file mode 100644
> index 0000000..5e365d7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/imx8qxp-clk.txt
> @@ -0,0 +1,39 @@
> +NXP i.MX8QXP Clocks Based on SCFW
> +--------------------------------------------------------------------
> +
> +Some i.MX SoCs contain a system controller that is responsible for
> +providing clock control service for the IPs. Communication between
> +the host processor running an OS and the system controller happens
> +through a SCU protocol [1].
> +
> +[1] Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
> +
> +Required properties:
> +
> +- compatible: Should be "fsl,imx8qxp-clock".
> +- #clock-cells: Should be <1>.
There's no reason for this node. Just make the parent (SCU) a clock
provider.
> +
> +The clock consumer should specify the desired clock by having the clock
> +ID in its "clocks" phandle cell.
> +See include/dt-bindings/clock/imx8qxp-clock.h
> +for the full list of i.MX8QXP clock IDs.
> +
> +Examples:
> +
> +#include <dt-bindings/clock/imx8qxp-clock.h>
> +
> +clk: clk {
> + compatible = "fsl,imx8qxp-clk";
> + #clock-cells = <1>;
> +};
> +
> +i2c0: i2c@5a800000 {
> + compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
> + reg = <0x0 0x5a800000 0x0 0x4000>;
> + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-parent = <&gic>;
> + clocks = <&clk IMX8QXP_I2C0_CLK>,
> + <&clk IMX8QXP_I2C0_IPG_CLK>;
> + clock-names = "per", "ipg";
> + ...
> +};
--
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