On Mon, Apr 23, 2018 at 05:46:09PM -0700, Eric Anholt wrote:
> These OpenGL ES GPUs are present in the 7268 and 7278 set top box
> chips.
>
> Signed-off-by: Eric Anholt <eric@xxxxxxxxxx>
> ---
> .../bindings/display/brcm,bcm-v3d.txt | 28 +++++++++++++++++++
Does this have display h/w? If not bindings/gpu/ would be more
appropriate.
> 1 file changed, 28 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/brcm,bcm-v3d.txt
>
> diff --git a/Documentation/devicetree/bindings/display/brcm,bcm-v3d.txt b/Documentation/devicetree/bindings/display/brcm,bcm-v3d.txt
> new file mode 100644
> index 000000000000..1c814714de0e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/brcm,bcm-v3d.txt
> @@ -0,0 +1,28 @@
> +Broadcom V3D GPU
> +
> +Only the Broadcom V3D 3.x and newer GPUs are covered by this binding.
> +For V3D 2.x, see brcm,bcm-vc4.txt.
> +
> +Required properties:
> +- compatible: Should be "brcm,7268-v3d" or "brcm,7278-v3d"
> +- reg: Physical base addresses and lengths of the register areas
> +- reg-names: Names for the register areas. The "hub", "bridge", and "core0"
> + register areas are always required. The "gca" register area
> + is required if the GCA cache controller is present.
> +- interrupts: The interrupt numbers. The first interrupt is for the hub,
> + while the following inerrupts are for the cores.
typo
> + See bindings/interrupt-controller/interrupts.txt
> +
> +Optional properties:
> +- clocks: The core clock the unit runs on
> +
> +v3d {
> + compatible = "brcm,7268-v3d";
> + reg = <0xf1204000 0x100>,
> + <0xf1200000 0x4000>,
> + <0xf1208000 0x4000>,
> + <0xf1204100 0x100>;
> + reg-names = "bridge", "hub", "core0", "gca";
> + interrupts = <0 78 4>,
> + <0 77 4>;
> +};
> --
> 2.17.0
>
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